Sr. Advanced Semiconductor Packaging Engineer - 653
Quantinuum
Brooklyn Park, MN, USA
4/7/2026
Full Time
Sr. Advanced Semiconductor Packaging Engineer - 653
We are seeking a Sr. Advanced Semiconductor Packaging Engineer in our Broomfield, CO, or Brooklyn Park, MN location to develop innovative and reliable packaging schemes for the highly scaled ion traps in our quantum computers. This role will be focused on developing our Apollo & Lumos quantum computers (Quantinuum system roadmap). The ideal candidate will be a mid-career engineer with a background in advanced packaging concepts. This role will work alongside ASIC designers, ion trap designers, Optical designers, & 3rd party vendors to prototype, design, & fabricate ion trap assemblies for our Quantum computers. Candidates should expect to be immersed in a fast-paced, multi-functional, team-based, and challenging technical environment where an individual with talent and initiative can stand out and thrive. Quantinuum believes that employees work better, more efficiently and more collaboratively in close proximity to other employees, where ideas can be exchanged readily, and decisions can be made more quickly for the benefit of the Company and our customers. All employees should work at their assigned location; however, this role may offer the opportunity to work remotely up to 2 days per week, with approvals. Key Responsibilities:
- Develop and implement advanced packaging concepts for tiling large assemblies of ion trap chips, electrical chips and optical chips together
- Develop and implement advanced packaging concepts for mechanical, thermal, electrical, optical, and detection interfaces to next-generation ion traps
- Develop packaging strategies and processes for large-format ion trap chips with high I/O signal count and density
- Work with vendors to implement and validate packaging processes
- Support all stages of ion trap development to ensure compatibility with packaging
- Interface with broader Quantinuum team to ensure ion trap packaging meets system requirements
- Engage with 3rd parties to cultivate key partnerships, supplier relationships, and co-development opportunities
- Bachelor’s degree minimum
- 5+ years of experience in an engineering or R&D environment
- 3+ years' experience in advanced semiconductor packaging development
- Due to Contractual requirements, must be a U.S. Person defined as, U.S. citizen permanent resident or green card holder, workers granted asylum or refugee status.
- Due to national security requirements imposed by the U.S. Government, candidates for this position must not be a People's Republic of China national or Russian national unless the candidate is also a U.S. citizen.
- PhD in Physics or Engineering
- 7 years' experience with advanced large area multi-chip semiconductor packaging technologies
- 5 years' experience with large heterogeneous integration and 2.5-3D packaging techniques
- 5 years' experience with high-density I/O technologies
- Experience with photonic packaging and fiber-to-chip or optical chip to optical chip coupling is a plus
- A proven track record of innovation and IP development
- Experience working within a cross-functional team environment
$129,000 - $161,000 a year
PI283629390